My name is José Pedro Castro Fonseca, and I was born in Vila do Conde, Portugal, on the 11th of January of 1993.
I studied Electrical and Computer Engineering at the Faculty of Engineering of the University of Porto, the most prestigious higher education institution in Portugal. After 5 years of studies, I was awarded a Master's Degree in Microelectronics and Embedded Systems. I am proud to have worked on a very ambitious and difficult thesis project: the implementation of an LSTM Neural Network in an FPGA platform, a work that greatly advanced the state-of-the-art in the subject at the time. You can read my conference article about it here, in IEEExplore.
Over my career I have worked in many different areas within my Master's major specialization, such as ASIC Design (Digital and Analog), Forward Error Correction algorithm implementations, Full-chip Verification (UVM/System Verilog), FPGA System Design, Embedded Systems Programming and Development and Digital and Analog Electronics.
I currently work for WiTricity, a US startup developing wireless chargers for Electric Vehicles. My work focuses on developing Digital Signal Processing and Machine Learning algorithms for correct object classifications on our embedded MCUs and FPGAs. Previously I worked at CERN, under the Fellowship Programme, as a Junior Electronics Engineer in the Microelectronics Section of the Experimental Physics department. Additionally, as a student, I was a Teaching Assistant in Programming (C language), Electronics and Calculus and Algebra.
In parallel with my career activities, I pursue interests in areas like Machine Learning, Digital Signal Processing and Computer Science.
As you will probably find examples throughout my website, I am a passionate learner, and a forever curious person. As such, I don't become intimidated with new task, or with theoretically intricate subjects. I actually thrive in them!
Furthermore, I am characterized by a fairly independent way of working. Of course, I gather advice and accumulated knowledge from work peers, but in the tend I tend to tread my own path, and come up with an original solution based on that advice.
Location: Zürich, Switzerland
Duration: April 2021 - Present (2 years and 6 months)
Development of foreign and living object ancillary systems for Wireless Electric Vehicle chargers. My responsabilities include:
Location: Zürich, Switzerland
Duration: April 2019 - April 2021 (2 years)
Location: Japan, Spain and Portugal
Duration: February 2019 - March 2019 (2 months)
Location: Geneva, Switzerland
Duration: September 2016 - January 2019 (2 years and 5 months)
Here I try to give you some details about what I have learnt and done over my career. This has substantial details when comparing to my pdf-format CV, but I nonetheless tried to keep it concise and relevant. I am happy to discuss in detail whatever else you might be curious to know.
In the table immediately below, is a short selection of the most relevant courses I took during my University. For a full list, with their respective grades, contact me.
Relevant Coursework Education | |
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Subject | Content Explanation |
Electronics I | Circuits with OpAmps, Diodes, FET Transistors and BJT Transistors. Circuit simulation with Multisim. |
Electronics II | High-frequency response of BJTs and FETs, Building blocks of intergated circuits (cascode, current mirrors, darlington pair, differential pair input, ...), Typical OpAmp internal structure. Circuit simulation with Multisim. |
Electronics III | Sampling-and-hold circuits, Filters (active, passive), Switched-capacitor filters, Tuned Amplifiers, Oscillators and Multivibrators, PLL structures and Frequency Synthesizers, Analog-to-digital and Digital-to-analog circuit architectures and characterization. CMOS Logic Gates. Circuit simulation with SPICE. |
Microwave and Radio-Frequency Engineering | Microwave circuit analysis, Filters and High-frequency amplifiers, Oscillators and Frequency Synthesizers. |
Control Theory | |
Signal Theory | |
Electrical Power Systems | |
Digital Signal Processing | |
Telecommunications Theory | Analog Modulations (AM, FM). Base-band Communications. Digital Modulations (ASK, FSK, PSK, PAM, QAM). Data compression and Information Theory. Synchronization and Clock Recovery. Spread-spectrum Techniques. DMT and OFDM. |
Machine Learning | Bayesian Decision Theory. Linear Regression. Linear methods for Classification (Fischer Discriminant, Logistic Regression, SVN). Neural Networks. Decision Trees. Boosting Techniques. Non-supervised learning (k-means clustering, dimensionality reduction with Principal Component Analysis). Markov Models. |
Digital Systems Architecture | Work-flow for industrial FPGA-based systems, RTL systems description using Verilog HDL, Testbench design for RTL verification, Single and Multi-clock synchronous systems. Clock distribution and synchronization. Comparative design of different topologies of Arithmetic function circuits, CORDIC Algorithm. Low-power CMOS and FPGA design. |
VLSI Circuit Design | Work-flow for industrial ASIC-based systems, Interconnect Modelling, Logic-gate design (static, dynamic, logic-effort methods), Layout edition (using Cadence Virtuoso), Standard-cell-based IC design techniques (floorplanning, place-and-routing, clock tree synthesis, parasitic extraction and post-extraction SPICE simulation). |
Embedded Systems Architecture | |
Distributed Systems Architecture | |
Operating Systems | |
Calculus, Algebra and Statistics |
Programming Languages | |
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C | Two courses on C, last one on Data-structures and Algorithms using C. Later courses focused on UNIX system programming (Multi-threaded and Kernel Driver space) and Embedded Systems. Work experience in developing C applications for railway embedded applications. Advanced user. |
C++ | Self-taught language. Entry-to-medium user |
Java | One course on Java, where the final project was the implementation of an online poker game. On my last year, I also implemented Gossiping Algorithms for peer-to-peer information propagation (code here) |
Python |
Self-taught language. Used it extensively in countless applications, but the most significant ones were:
|
MATLAB/Octave | My faithful companion during university years for Algebra, Numerical Methods, Signal Theory, Control Theory, DSP, etc... Recently I use Python for all these things. I also posses experience using Simulink. Medium-level user. |
HDL Languages | |
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Verilog | |
VHDL | Self-taught language. Used it extensively during my work at CERN while implementing an FPGA test system for the prototypes of the Entry-to-medium user |
System Verilog/UVM | Formal training at imec, in Belgium. Extensively used in the verification of the lpGBT Gigabit Transceiver, during my work at CERN. Advanced user. |
CocoTB | A set of Python functions that allow its co-simulation with HDL modules, allowing the creation of a testbench in Python. Entry-level user. |
Analog/Digital Electronics | |
---|---|
Projects/Experience | |
EDA Software | |
SPICE | I have experience both with HSpice and LTSpice. Nowadays, I only LTSpice, since its completely free of charge, and for the scale of the hobby projects that I work on, its performance is sufficient. I used HSpice mostly during my academic years. |
Multisim | Again, mostly used during my academic years. The biggest project I have use it for, was for the simulation of a 741-like OpAmp, using discrete components, that was designed as an assignment in one of my electronics classes (afterwards was built on a PCB). |
Cadence Virtuoso Suite | Experience in two main projects: one in academia, where I implemented a Full-custom barrel shifter; and the other while at CERN, where I developed an on-chip temperature sensor (integrated analog IC design). In this projects, with the guidance of my supervisor, I worked autonomously through all stages of the flow: theoretical conception, schematic simulation, layout entry and post-layout parasitic extraction simulations. |
FPGA Design | |
---|---|
Cores | |
Xilinx |
|
Altera |
|
EDA Software | |
Questasim |
|
Xilinx Vivado | |
Intel Quartus Prime |
Major in Microelectronics and Embedded Systems. Minors in Machine Learning, Microwave and RF Engineering and Multimedia Processing and Encoding
In my Master's Thesis, I implemented a Long short-term memory Neural Network in FPGA. This implementation advanced the state-of-the-art at the time, providing a fully on-chip implementation of the recurrent Neural Network. This work was published at the 2016 IEEE International Conference on Reconfigurable Computing, where I gave an oral presentation on the subject. You can read my article here, on IEEExplore.
The focus of this course is the adaptation of machine learning algorithms to internet-of-things scenarios.
Introductory course on the SystemVerilog language and the UVM Verification Methodology.
Here is a list of my most significant life achievements. As honoured as I might feel for them, the true driving force
that led me to them was my insatiable need for learning: they simply come as a by-product of my efforts to feed my curiosity about the world.
The one that I am the most proud, is my participation in the
42nd International Physics Olympiad, where I have conquered
an Honourable Mention. This enabled me to study university-level physics already during high-school.
Location: Bangkok, Thailand
Date: July 2011
Worldwide competition for the best high school students in physics (a total of 450 students, worldwide), consisting of a theoretical and laboratory exam on university-level physics. I won an honourable mention, finishing in the top 40% participants.
Location: Portugal
Sponsor: Fundação Calouste Gulbenkian
Date: Nov 2012 -- Sep 2013
Scholarship for outstanding university students, aiming to produce a small research work in advanced Mathematics. My research used probabilistic methods to analyze the distribution of prime numbers. You can read my final work, in this small presentation.
Location: Porto, Portugal
Sponsor: University of Porto
Date: March 2013
Award for the student from each Faculty of the University of Porto with the best grade average in the 2011/2012 academic year.